Department of Electrical Engineering

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In this paper, we study the physical layer secrecy performance of a hybrid satellite and free-space optical (FSO) cooperative system. The satellite links are assumed to follow the shadowed-Rician fading distribution, and the channel of the terrestrial link between the relay and destination is assumed to experience the gamma-gamma fading. For the FSO communications, the effects of different types of detection techniques (i.e., heterodyne detection and intensity modulation with direct detection) as well as the pointing error are considered. We derive exact analytical expressions for the average secrecy capacity and secrecy outage probability (SOP) for both cases of amplify-and-forward (AF) and decode-and-forward (DF) relaying. The asymptotic analysis for the SOP is also conducted to provide more insights on the impact of FSO and satellite channels on secrecy performance. It is found that with the AF with fixed gain scheme, the secrecy diversity order of the investigated system is only dependent on the channel characteristics of the FSO link and the FSO detection type, whereas the secrecy diversity is zero when the relay node employs DF or AF with variable-gain schemes. © 2009-2012 IEEE.

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IEEE Photonics Journal

Physical layer security of hybrid satellite-FSO cooperative systems

This letter investigates the secrecy performance of the classical Wyner's wiretap model, where the main channel and eavesdropper channel experience correlated alpha-mu fading. Novel and exact expressions for the average secrecy capacity and secrecy outage probability are derived for the considered realistic scenario. The effect of correlation has been studied on the secrecy performance. Useful insights into the system performance are obtained through the asymptotic analysis.

IEEE COMMUNICATIONS LETTERS

Secrecy Performance of Correlated alpha-mu Fading Channels

Polycrystalline Aluminum Nitride (AlN) thin films are of significant interest due to their pyroelectric properties for last few years. In this paper, study on development of a polycrystalline AlN thin film based bulk micromachned pyroelectric IR sensor is presented. Structural optimization of IR sensor has been carried out using 3D finite element modeling (FEM) and simulations. A 1.0 μm thick thermally grown SiO2 layer used for thermal isolation, also serves as a diaphragm to hold the fabricated IR sensor. Rate of temperature change (dT/dt) of the sensor under dynamic heating is 0.12–0.15°K/s, and agrees well with the simulated value of 0.1°K/s. High pressure, N2 ambient sputtered Au film of thickness 160 nm has been used to enhance the IR absorptivity. IR absorptivity of sensor on medium to long wave (2.5–25 μm) radiations is nearly 67%, and creates thermal gradient of 0.23°K between sensor and substrate. Developed pyroelectric IR sensor exhibits response time 8.0 ms, pyroelectric coefficient (ρ) 0.32 × 10−4 C/m2K, ρ/ε figure of merit (FOM) 3.0 μC/m2K, and pyroelectric current responsivity (Ri) of 2.5 × 10-6 A/W. © 2019 Elsevier B.V.

Sensors and Actuators, A: Physical

MEMS AlN pyroelectric infrared sensor with medium to long wave IR absorber

Packaging is one of the most critical tasks for MEMS devices. Unlike solid state devices, MEMS structures involves moving structures which needs to be protected from outer environment ensuring free movement of the structure. In the present paper, inverted silicon cavity is used for capping the MEMS devices. However, in case of RF MEMS, silicon cavity would add parasitics and affects its electrical performance. Enclosing the MEMS structure, its mechanical response will also alter. The electrical as well as mechanical characteristics of the RF MEMS switch are analyzed using finite element method simulations. The electrical response of the fabricated switch after packaging is compared with unpackaged device. © 2018, Springer-Verlag GmbH Germany, part of Springer Nature.

Microsystem Technologies

Low temperature epoxy bonding for RF MEMS capacitive switch

Radio frequency micro-electro-mechanical system (RF MEMS) switch is basic component for transponders used in communication system. Switch “OFF/ON” capacitance ratio plays major role in controlling signal to noise ratio. Theoretically, with high dielectric constant material or floating metal concept, capacitance ratio can be improved up to 2000 or even more. Whereas, in most of the practical cases, measured ratio is less than 200. In present paper, RF MEMS capacitive switch LCR parameters are extracted considering parasitic capacitance to explain the mismatch of measured results. Parasitic capacitance is independent from device overlap area. Parasitic capacitance is function of switch geometry and directly proportional to dielectric constant of the substrate material. © 2019, The Korean Institute of Electrical and Electronic Material Engineers.

Transactions on Electrical and Electronic Materials

Effect of Parasitic Capacitance on RF MEMS Switch OFF/ON Ratio

In this paper we propose a distributed locality sensitive hashing based framework for image super resolution exploiting computational and storage efficiency of cloud. Now days huge multimedia data is available on the cloud which can be utilized using store anywhere and excess anywhere model. It may be noted that super resolution is required for consumer electronics display devices due to various reasons. The propose framework exploits the image correlation for image super resolution using locality sensitive hashing (LSH) for manifold learning. In our work we have exploited the benefits of manifold learning for image super resolution, which in-turn is a highly time complex operation. The time complexity is involved due to finding the approximate nearest neighbors from trillion of image patches for locally linear embedding (LLE) operation. In our approach it is mitigated by using a distributed framework which internally uses hash tables for mapping of patches in the target image from a database of internet picture collection. The proposed framework for super resolution provides promising results in comparison to existing approaches. © 2019, Springer Science+Business Media, LLC, part of Springer Nature.

Department of Computer Science & Engineering

Department of Mechanical Engineering

Multimedia Tools and Applications

Image super resolution using distributed locality sensitive hashing for manifold learning

Lateral nanosheet field-effect-transistor (FET) is now targeting for 3nm CMOS technology node [1], [2]. It is important to see quantization effect at such confined geometry. In this work, we study the geometrical confinement effects in silicon nanosheet. We developed a unified phenomenological model for insulator capacitance (Cins) in rectangular (i.e., Nanosheet) cross-section gate-all-around (GAA) FET to solve the gate charge density accurately. It is observed that multi-subband conduction causes humps in higher order derivatives of charge vs gate voltage characteristics which may affect the performance of analog and RF circuits. © 2019 IEEE.

2019 IEEE SOI-3D-Subthreshold Microelectronics Technology Unified Conference, S3S 2019

Modeling the Quantum Gate capacitance of Nano-Sheet Gate-All-Around MOSFET

A new design to overcome the nonuniformity of capacitance matching along the channel of a negative capacitance field-effect transistor is presented in this letter. By introducing nonuniform oxidation, the thickness of SiO2 at the edge regions of the channel can be increased while maintaining the thickness of SiO2 at the center region of the channel. As a result, the capacitance along the channel becomes more uniform, and better capacitance matching between the dielectric and ferroelectric can be achieved. The Sentaurus TCAD results show improvement of matching in the center region and a significant boost of ON-current (20% improvement). © 2019 IEEE.

IEEE Electron Device Letters

Optimization of NCFET by Matching Dielectric and Ferroelectric Nonuniformly Along the Channel

In this work, we present the recent and upcoming enhancements of the industry standard BSIM-BULK (formerly BSIM6) model. BSIM-BULK is the latest body referenced compact model for bulk MOSFETs having a unified core, which is developed by the BSIM group for accurate design of analog and RF circuits. The model satisfies the symmetry test for DC and AC, correctly predicts harmonic slope, and exhibits accurate results for RF and analog simulations. In order to further improve the model accuracy for transconductance (gm) and output conductance (gds), an analytical model for bulk charge effect, in both current and capacitance, is implemented. Several other advanced models are added to capture real device physics. These include: parasitic current at the shallow trench isolation edges; leakage current components in zero threshold voltage native devices; new model for NQS to capture the NQS effects up to the millimeter wave regime; self heating effect; and heavily halo implanted MOSFET's anomalous gm, flicker noise and IDS mismatch. All these enhancements have been implemented to high standards of computational efficiency and robustness. © 2019 IEEE.

Proceedings of the Custom Integrated Circuits Conference

BSIM-BULK: Accurate Compact Model for Analog and RF Circuit Design

The spacer design of the negative-capacitance FinFET (NC-FinFET) is investigated by using Sentaurus technology computer-aided design (TCAD). The spacer affects not only the gate capacitance but also the drain current due to the additional gate control from the outer fringing field. It is found that in a heavily loaded circuit although the fin corner spacer improves the inverter propagation delay of the baseline FinFET, the NC-FinFET requires the fin selective spacer with the spacer height up to the ferroelectric thickness for better capacitance matching. When the wire capacitance is 3 times larger than the gate capacitance, the inverter propagation delay of the NC-FinFET with the fin selective spacer can be improved by 8% against the full spacer design. However, with the consideration of process complexity, the air spacer may still be attractive in the NC-FinFET, since it does not suffer from the amplified gate capacitance. © 1980-2012 IEEE.