Department of Electrical Engineering

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IIT Jodhpur

This paper presents piezoresistive nanowires based pressure sensor with a novel and low-cost nanowire fabrication technique. Silicon nanowire sensing element (width<100 nm) is chosen because of their higher piezoresistive coefficient compared to bulk silicon and integrated into MEMS diaphragm to measure pressure up to 2 bar. The novelty of the proposed process lies in making nanowires with controllable dimensions (CD < 100 nm) and with no dependency on the lithography tool limitations. Initially, this process is optimised for nanowires and then simulations are carried out for the pressure sensor. Simulation results are presented for a pressure sensor having a diaphragm thickness of 10 μm and the sensor fabrication is currently ongoing. Proposed nanowire fabrication process can potentially be utilized to obtain any nano-dimension structure without using expensive masks and special lithography tools. © 2017 IEEE.

World University root node

Proceedings of IEEE Sensors

Low-cost and reliable nanowire fabrication method for ultrasensitive pressure sensor

Room temperature operated sensor for detection of alcohol vapours in low ppm range based on TiO2 functionalized nano-porous silicon (PSi) is demonstrated. The effect of functionalization by TiO2 on PSi is investigated using SEM, EDX, Raman spectroscopy, XRD and contact angle measurements. Sensing is accomplished by measuring change in resistance of the sensing layer using Cr-Au inter-digitated-electrode (IDE) structure formed on top of the functionalized PSi layer. The sensors were tested for volatile organic compounds (VOCs) and water vapours in the wide range of 5–500 ppm concentration at room temperature. Functionalization of the nanostructured PSi by sputter deposited TiO2 results in significant enhancement of sensitivity and inverse change in selectivity. PSi sensors have displayed strong response to water vapours whereas after functionalization, selective sensing to ethanol is depicted. Minimum detection by PSi sensors is portrayed at 100 ppm and that of functionalized sensors is at 10 ppm. Sensing mechanism is explained on the basis of surfaces and structures of both PSi and TiO2. This study incites the importance of surface treatment of PSi for tuning the sensing properties and is useful in the development of selective alcohol sensors. © 2016

Journal of Materials Science and Technology

Effect of TiO2 Functionalization on Nano-Porous Silicon for Selective Alcohol Sensing at Room Temperature

An accurate physics-based lumped-circuit model, representing the nonquasi-static effect and the distributed polygate electrode resistance in bulk MOSFET is proposed. In our approach, an improved physical equivalent circuit capturing NQS effect is developed by using pole-zero compensation technique. The new model takes into account the inherent delay in the response of channel charges to the applied voltage. The proposed model is implemented in BSIM6 MOSFET model, and it is validated with Y-parameter data obtained from technology computer-aided design device simulations. The proposed model is in very good agreement with the device data up to 50/t, which ensures that it is suitable for most RF applications over any other computationally complex compact models. © 2016 IEEE.

2016 3rd International Conference on Emerging Electronics, ICEE 2016

Compact modeling of nonquasi-static effect in bulk MOSFETs for RF circuit design in sub-THz regime

We demonstrate spectral broadening based on cascaded Raman and intermodal nonlinear interaction in Corning ®LEAF® fiber pumped by a picosecond laser source. The effect of fiber length and pump power over spectral broadening are also investigated. © OSA 2017.

Optics InfoBase Conference Papers

Experimental investigation of cascaded raman and intermodal nonlinear interaction based supercontinuum generation in corning ®LEAF® fiber

Recently, the IEEE P1918.1 standardization activity has been initiated for defining a framework for the Tactile Internet. Within this activity, IEEE P1918.1.1 is a task group for the standardization of Haptic Codecs for the Tactile Internet. Primary goal of the task group is to define/develop codecs for both closed-loop (kinesthetic information exchange) and open-loop (tactile information exchange) communications. In this paper, we propose a reference hardware and software setup for the evaluation of kinesthetic codecs. The setup defines a typical teleoperation scenario in a virtual environment for the realization of closed-loop kinesthetic interactions. For the installation and testing of the setup, we provide detailed guidelines in the paper. The paper also provides sample data traces for both static and dynamic kinesthetic interactions. These data traces may be used for preliminary testing of kinesthetic codecs. The paper also provides links for the download of both the reference setup and the data traces. © 2017 IEEE.

HAVE 2017 - IEEE International Symposium on Haptic, Audio-Visual Environments and Games, Proceedings

A candidate hardware and software reference setup for kinesthetic codec standardization

In this paper, we demonstrate using extensive TCAD simulations that low frequency noise behavior is significantly different in presence of halo implants. The study of the noise behavior is extended to source side halo, drain side halo, symmetric halos and uniformly doped devices for different doping and length of the halo regions. Our study shows that source side halo region is responsible for the anomalous noise behavior in saturation. Such noise behavior can be accurately modeled with the presented SPICE model over wide range of biases and geometries. This study physically explains the trends observed in low frequency noise measurement in advanced CMOS technologies. © 2016 IEEE.

Analysis and modeling of low frequency noise in presence of doping non-uniformity in MOSFETs

In this paper, we report the anomalous behavior of capacitances in halo channel MOSFET for the linear and saturation regions. Unlike MOSFETs these devices have different threshold voltage (VTH) for the DC and CV operations, and therefore cannot be modeled by conventional methods. We have investigated various cases of doping non-uniformity: Source side halo (SH), Drain side halo (DH), both side halos (Halo) and uniformly doped (UD) transistors using TCAD simulations under various bias conditions. A computationally efficient SPICE model is used to model these trends which shows excellent matching with the measured and TCAD data. © 2017 IEEE.

2017 IEEE Electron Devices Technology and Manufacturing Conference, EDTM 2017 - Proceedings

Analysis and modeling of capacitances in halo-implanted MOSFETs

The penetration of dc distributed power systems is increasing rapidly in electric power grids and other isolated systems to cater demand for cheap, clean, high quality, and uninterrupted power demand of modern society. DC systems are more efficient and suite better to integrate some of the renewable energy sources, storage units, and dc loads. A dc distributed power system usually consists of large number of power electronic converters connected in cascad0ed configuration to satisfy the power quality and voltage magnitude requirements of the sources and loads. Tightly-regulated power converters in the aforementioned settings exhibit negative incremental impedance and behave as constant power loads (CPLs), and tend to destabilize their feeder systems and upstream converters. The presence of CPLs reduces effective damping of the system leading to instability of the whole system and present significant challenge in the system operation and control. In-depth knowledge of the instability effects of constant power loads (CPLs), available stabilizing techniques and stability analysis methods, is imperious to the young researchers, system designers, system integrators, and practicing engineers working in the field of dc power systems and emerging applications of dc power. This paper is intended to fill this gape by documenting present state of the art and research needs in one article. Modeling, behaviour and effects of typical CPL are discussed and a review of stability criteria used to study the stability of dc power systems are reviewed with their merits and limitations. Furthermore, available literature is reviewed to summarize the techniques to compensate the CPL effect. Finally, discussion and recent challenges in the dc distribution systems. © 2017 Elsevier Ltd

Renewable and Sustainable Energy Reviews

Constant power loads and their effects in DC distributed power systems: A review

In this paper, we investigate the correlation between optimal set of driver nodes and networked sensitivity of Complex Networked Systems (CNS). Here, we study the networked sensitivity between a pair of control and output nodes for interconnected directed and undirected networks. We investigate the importance of the optimal driver nodes based on new index of the networked control system, which is networked sensitivity in the networked system. In this paper, we discuss to select the optimal set of driver nodes corresponding to minimum networked sensitivity w.r.t. (i) maximum DC-Gain and (ii) a range of frequency. In particular, we develop an algorithm to select the optimal set of driver nodes which has minimum networked sensitivity. Finally, we validate theoretical results with the help of network examples. © 2017 IEEE.

2017 Indian Control Conference, ICC 2017 - Proceedings

Selection of optimal set of driver nodes based on networked sensitivity in complex networked systems

Design of a stable Phase Locked Loop (PLL) working in MHz frequency range is proposed. Focus of this work is to achieve a symmetric design, where rise and fall time are equal for low operating frequencies. All the blocks of PLL i.e Phase Frequency Detector (PFD), Charge Pump and Loop Filter (CPLF), Voltage Controlled Oscillator (VCO) and Frequency Divider (FD) are carefully designed and integrated. PFD is implemented using D flip-flop and is made to detect minimal phase errors. CPLF has differential design for noise immunity and for avoiding floating conditions. The 15 stage VCO gives frequency range of 30 MHz to 200 MHz for input voltage range of 0.5 V to 1.05 V with a resistor for optimizing linearity. The integrated PLL is stable in the output frequency range of 44 MHz to 200 MHz for given input frequency range of 11 MHz to 50 MHz. The designs are implemented in 180 nm technology and for a supply voltage of 1.8 V. © 2017 IEEE.