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Negative-Capacitance FinFETs: Numerical Simulation, Compact Modeling and Circuit Evaluation
J.P. Duarte, Y.-K. Lin, Y.-H. Liao, A. Sachid, M.-Y. Kao, , P. Kushwaha, K. Chatterjee, D. Kwon, H.-L. ChangShow More
Published in Institute of Electrical and Electronics Engineers Inc.
Volume: 2018-September
Pages: 123 - 128
A complete simulation framework is presented for Negative Capacitance FinFETs including Numerical Simulation, Compact Modeling, and Circuit Evaluation. A 2D Numerical Simulation for FinFETs coupled with the Landau's Ferroelectric Model captures device characteristics. A new version of the distributed Negative-Capacitance FinFET Compact Model is also presented in this work, where influence of short-channel effects in Ferroelectric voltage amplification are newly incorporated. Finally, a detailed analysis, from an energy perspective, is presented for the gate voltage amplification of Negative Capacitance FinFETs in ring-oscillator circuits. © 2018 IEEE.