Header menu link for other important links
Modeling STI Edge Parasitic Current for Accurate Circuit Simulations
S. Khandelwal, , J.P. Duarte, K. Chan, S. Dey, Y.S. Chauhan, C. Hu
Published in Institute of Electrical and Electronics Engineers Inc.
Volume: 34
Issue: 8
Pages: 1291 - 1294
We enhance the capability of industry standard compact model BSIM6 to model the parasitic current Iedge at the shallow trench isolation edge. Accurate, efficient, and scalable model for Iedge is developed by finding the key differences between Iedge and main device drain current (Imain). It is found that Iedge has a different sub-threshold slope, body-bias coefficient, and short-channel behavior as compared to Imain. These important effects along with their dependencies on device geometry, bias conditions, and temperature are accounted for in the model. The model is in excellent agreement with experimental data verifying its scalability and readiness for production level usage. © 2015 IEEE.
About the journal
JournalData powered by TypesetIEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems
PublisherData powered by TypesetInstitute of Electrical and Electronics Engineers Inc.