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Modeling of Induced Gate Thermal Noise Including Back-Bias Effect in FDSOI MOSFET
C.K. Dabhi, A. Dasgupta, P. Kushwaha, , C. Hu, Y.S. Chauhan
Published in Institute of Electrical and Electronics Engineers Inc.
Volume: 28
Issue: 7
Pages: 597 - 599
We present a charge-based compact model for induced gate thermal noise for a fully depleted silicon-on-insulator transistor. The model uses front- and back-gate charges as well as the respective mobilities for the development of analytical expression. The model is implemented in Verilog-A and validated with experimentally calibrated TCAD simulations. The model predicts the high-frequency behavior with good accuracy while capturing the back-bias dependence. © 2001-2012 IEEE.
About the journal
JournalData powered by TypesetIEEE Microwave and Wireless Components Letters
PublisherData powered by TypesetInstitute of Electrical and Electronics Engineers Inc.