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Evaluation of device parameters of HfO2/SiO2/Si gate dielectric stack for MOSFETs
A. Madan, , P.J. George, C. Shekhar
Published in
Pages: 386 - 391
Among the potential candidates for replacement of SiO2 or SiOxNy as gate dielectric [1], HfO2 seems to be one of the most promising materials [2-5], combining high dielectric permittivity with low leakage current due to a reasonably high barrier height that limits electron tunneling [6]. Other requirements [7-8] on gate dielectric materials like low density of interface states, gate compatibility, structural, physical and chemical stability at both gate electrode/dielectric and dielectric/silicon interfaces are currently making the object of intensive investigation for sub 0.1μm channel length devices using high-k dielectrics. The transition layer becomes important in such dielectrics in deciding the device performance. In this paper, we discuss the scaling limits of HfO 2/SiO2 stacked dielectrics taking into consideration the impact of transition layer between HfO2 and SiO2. In this paper, analysis of HfO2/SiO2 gate dielectric stack has been carried out for replacement of SiO2 using an appropriate direct-tunneling gate-current model. It has the potential to satisfy the projected off-state leakage current requirements of future high-performance and low-power technologies. © 2005 IEEE.
About the journal
JournalProceedings of the IEEE International Conference on VLSI Design