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Engineering negative differential resistance in NCFETs for analog applications
, P. Kushwaha, J.P. Duarte, Y.-K. Lin, A.B. Sachid, M.-Y. Kao, H.-L. Chang, S. Salahuddin, C. Hu
Published in Institute of Electrical and Electronics Engineers Inc.
2018
Volume: 65
   
Issue: 5
Pages: 2033 - 2039
Abstract
In negative capacitance field-effect transistors (NCFETs), drain current may decrease with increasing Vds in the saturation region, leading to negative differential resistance (NDR). While NDR is useful for oscillator design, it is undesirable for most analog circuits. On the other hand, the tendency toward NDR may be used to reduce the normally positive output conductance (gds) of a short-channel transistor to a nearly zero positive value to achieve higher voltage gain. In this paper, we analyze the NDR effect for NCFET in the static limit and demonstrate that it can be engineered to reduce gds degradation in short-channel devices. Small and positive gds is achieved without compromising the subthreshold gain, which is crucial for analog applications. The 7-nm ITRS 2.0 FinFET with 0.7 V Vdd is used as the baseline device in this paper. © 1963-2012 IEEE.
About the journal
JournalData powered by TypesetIEEE Transactions on Electron Devices
PublisherData powered by TypesetInstitute of Electrical and Electronics Engineers Inc.
ISSN00189383