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Compact Modeling Source-to-Drain Tunneling in Sub-10-nm GAA FinFET with Industry Standard Model
Y.-K. Lin, J.P. Duarte, P. Kushwaha, , H.-L. Chang, A. Sachid, S. Salahuddin, C. Hu
Published in Institute of Electrical and Electronics Engineers Inc.
Volume: 64
Issue: 9
Pages: 3576 - 3581
We present a compact model for source-to-drain tunneling current in sub-10-nm gate-all-around FinFET, where tunneling current becomes nonnegligible. Wentzel-Kramers-Brillouin method with a quadratic potential energy profile is used to analytically capture the dependence on biases in the tunneling probability expression and simplify the equation. The calculated tunneling probability increases with smaller effective mass and with increasing bias. We at first use the Gaussian quadrature method to integrate Landauer's equation for tunneling current computation without further approximations. To boost simulation speed, some approximations are made. The simplified equation shows a good accuracy and has more flexibility for compact model purpose. The model is implemented into industry standard Berkeley Short-channel IGFET Model-common multi-gate model for future technology node, and is validated by the full-band atomistic quantum transport simulation data. © 1963-2012 IEEE.
About the journal
JournalData powered by TypesetIEEE Transactions on Electron Devices
PublisherData powered by TypesetInstitute of Electrical and Electronics Engineers Inc.