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Compact Implementations of FPGA-based PUFs with Enhanced Performance
N.N. Anandakumar, M.S. Hashmi,
Published in Institute of Electrical and Electronics Engineers Inc.
Pages: 161 - 166
The Physically Unclonable Functions (PUFs) are used in numerous security applications such as device authentication, secret key generation, FPGA intellectual property (IP) protection, and trusted computing. In this paper, compact implementations of Ring oscillator-based PUF (RO-PUF), Arbiter-based PUF (A-PUF) and RS Latch-based PUF (RS-LPUF) on an FPGA (Field Programmable Gate Array) platform are presented. The proposed schemes provide very competitive area trade-offs and effectively enable smallest FPGA implementations, reported so far, of RS-LPUF, RO-PUF, and A-PUF respectively. The designs have been validated by developing prototypes on Xilinx Spartan-6 FPGAs at core voltage of 1.2V and normal operating temperature. Finally, a detailed comparison of statistical analysis on their performance using measured PUF data have been carried out. It has been demonstrated that the proposed designs exhibit significantly improved performance in terms of statistical properties when compared to the existing works. © 2016 IEEE.