This paper presents an efficient method for the estimation of jitter due to power supply noise in a chain-of-inverters including the on-chip-interconnects. An analytical noise transfer function from power supply to output is derived based on a small-signal analysis. The estimation of jitter is done using a slope-based semi-analytical approach and the results are compared with the SPICE-based simulations. © 2019 IEEE.

Jai Narayan Tripathi

Department of Electrical Engineering

IIT Jodhpur

M.S. Illikkal

H. Shrimali

R. Achar

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Journal	Data powered by Typeset2019 IEEE 23rd Workshop on Signal and Power Integrity, SPI 2019 - Proceedings
Publisher	Data powered by TypesetInstitute of Electrical and Electronics Engineers Inc.