This paper presents an analysis of jitter due to various deterministic noise sources in a CMOS inverter. The results obtained from the semi-analytical jitter estimation approach presented in the paper are compared with the results obtained from full SPICE based simulations. For the estimation of jitter, EMPSIJ method [1] is used in the paper. The paper also discusses the sensitivity of various noise paths on jitter. © 2019 IEEE.

Jai Narayan Tripathi

Department of Electrical Engineering

IIT Jodhpur

M.S. Illikkal

H. Shrimali

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Journal	Data powered by Typeset2019 6th International Conference on Signal Processing and Integrated Networks, SPIN 2019
Publisher	Data powered by TypesetInstitute of Electrical and Electronics Engineers Inc.