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An approximate carry estimating simultaneous adder with rectification
R. Bhattacharjya, V. Mishra, S. Singh, K. Goswami,
Published in Association for Computing Machinery
Pages: 139 - 144
Approximate computing has in recent times found significant applications towards lowering power, area, and time requirements for arithmetic operations. Several works done in recent years have furthered approximate computing along these directions. In this work, we propose a new approximate adder that employs a carry prediction method. This allows parallel propagation of the carry allowing faster calculations. In addition to the basic adder design, we also propose a rectification logic which would enable higher accuracy for larger computations. Experimental results show that our adder produces results 91.2% faster than the conventional ripple-carry adder. In terms of accuracy, the addition of rectification logic to the basic design produces results that are more accurate than state-of-the-art adders like SARA [13] and BCSA [5] by 74%. © 2020 Association for Computing Machinery.
About the journal
JournalData powered by TypesetProceedings of the ACM Great Lakes Symposium on VLSI, GLSVLSI
PublisherData powered by TypesetAssociation for Computing Machinery