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A super-pixel based on-chip image compression for high speed CMOS image sensors
D. Mishra, , M. Sarkar
Published in Institute of Electrical and Electronics Engineers Inc.
Volume: 2017-January
Pages: 1 - 2
A super-pixel based on-chip compression is proposed in this paper. The compression is achieved by reading only one sample for each super-pixel. The proposed technique and the corresponding circuit are simulated in MATLAB and UMC 180 nm CMOS technology, respectively. Higher values of PSNR are observed as compared to the state-of-the-art on-chip compression techniques. For the compression factor of 2, the implemented design results in 49% of power saving. © 2017 IEEE.