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A low complexity algorithm for sampling clock-offset compensation in low power WPAN receivers
S. Jos, K. Bynam, P.S. Chandrashekhar Thejaswi, A.D. Gore, Y.-J. Hong, C. Park, J.P. Nair,
Published in Institute of Electrical and Electronics Engineers Inc.
2016
Pages: 833 - 836
Abstract
This paper presents a low complexity algorithm for compensating the sampling-clock frequency offset encountered in short-range WPAN receivers. The proposed algorithm leverages on the pulse shaping information in the transmitted signal to identify erroneous samples resulting from the sampling-clock frequency offset and then compensates for the same. Simulation results demonstrate that the proposed algorithm almost completely compensates for offsets of magnitudes specified by WPAN standards. © 2016 IEEE.